LMK105BJ681KV-T [TAIYO YUDEN]
CAP,CERAMIC,680PF,10VDC,10% -TOL,10% +TOL,X7R TC CODE,-15,15% TC,0402 CASE;
| 型号： | LMK105BJ681KV-T |
| 厂家： | 
TAIYO YUDEN (U.S.A.), INC |
| 描述： | CAP,CERAMIC,680PF,10VDC,10% -TOL,10% +TOL,X7R TC CODE,-15,15% TC,0402 CASE |
| 文件： | 总15页 (文件大小：781K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
一般積層セラミックコンデンサ
（高誘電率系・Class 2）
STANDARD MULTILAYER CERAMIC CAPACITORS
(CLASS2 :HIGH DIELECTRIC CONSTANT TYPE)
B/BJ
X7R
X5R
F
K25VJ85C
K55V J 125C
K55V J 85C
K25VJ85C
K30V J 85C
B
ꢀ
OPERATING TEMP.
F
Y5V
特長ꢀFEATURES
Y実装密度の向上が図れます
YImprove Higher Mounting Densities.
YMultilayer block structure provides higher reliability
Y同 YA wide range of capacitance values available in standard case sizes.
Yモノリシックの構造のため、信
頼性が高い
一形状、静電容量範囲が広い
用途ꢀAPPLICATIONS
Y一般電子機器用
YGeneral electronic equipment
Y通信
YCommunication equipment (portable telephones, PHS, other wireless ap-
plications, etc.)
ꢀ
機器用（携帯電話、PHS、コードレス電話 etc.）
形名表記法ꢀORDERING CODE
1
4
6
7
9
容量許容差 hLi
個
別仕様
K
定格電圧 hVDCi
形状寸法fEIAgLPWhmmi
公称静電容量 hpFi
A
4
063(0201)
105(0402)
107(0603)
0.6P0.3
1.0P0.5
1.6P0.8
例
K
M
Z
M 10
標準
J
6.3
10
102
223
1000
M 20
80
Mꢀ
20
L
22000
E
T
U
16
25
50
10
包装
B
F
T
8
5
単品f袋詰めg
テーピングf2mmピッチY178Bg
製品厚 み hmmi
2
温度特性
QB,BJ
QF
P
V
Z
0.3
0.5
0.8
テーピングf4mmピッチY178Bg
M10L
シリーズ名
M
30
M10L
80
積層コンデンサ
QWスペース
11
3
当社管理記号
Q
標準
端子電極
QWスペース
K
メッキ品
_
L M K 1 0 5 B J 1 0 4 K V F Z
1
2
3
4
5
6
7
8
9
10
11
1
4
6
7
9
Capacitance TolerancehLi
ꢀSpecial code
Rated voltagehVDCi
Dimensions (case size)fLPWghmm
i
Nominal CapacitancehpFi
A
4
063(0201)
105(0402)
107(0603)
0.6P0.3
1.0P0.5
1.6P0.8
example
K
M
Z
M 10
K
Standard products
J
6.3
102
223
1000
M 20
80
L
10
22000
Mꢀ
20
E
T
U
16
25
50
10
8
Packagingꢀ
B
F
T
5
Bulk
Thicknesshmmi
Tape&Reelf2mm pitchY178Bg
Tape&Reelf4mm pitchY178Bg
Temperature characteristics code
2
P
V
Z
0.3
K55VJ125C
0.5
0.8
X7R
ꢀ
Series name
QB
M15L
M
Multilayer ceramic capacitor
BJ
K55VJ85C
M15L
X5R
11
K30VJ85C
Internal code
3
QF Y5V
22
Mꢀ L
82
Q
Standard Products
End terminationꢀ
QWBlank space
QWBlank space
K
Plated
52
外形寸法ꢀEXTERNAL DIMENSIONS
TypefEIAg
GMK063
f0201g
GMK105
f0402g
L
W
T
e
0.6M0.03
0.3M0.03
0.3M0.03
f0.012M0.001g
0.5M0.05
f0.020M0.002g
50.8M0.10
f0.031M0.004g
0.15M0.05
f0.006M0.002g
0.25M0.05
f0.010M0.002g
0.35M0.25
f0.014M0.010g
UnitDmmfinchg
P
V
Z
f0.024M0.001g f0.012M0.001g
1.0M0.05 0.5M0.05
f0.039M0.002g f0.020M0.002g
1.6M0.10 ꢀ0.8M0.10
f0.063M0.004g f0.031M0.004g
GMK107
f0603g
4
概略バリエーションꢀAVAILABLE CAPACITANCE RANGE
Type
Temp.char.
WV
063
105
107
BJ/X5R
BJ/X7R
F/Y5V
B/X7R
F/Y5V
Cap
10V 6.3V 50V 25V 16V
10V 50V 25V 16V
10V 6.3V
4V
50V
25V 50V
25V
[pF 3digits]
[pF]
221
331
471
681
102
152
222
332
472
682
103
153
223
333
473
683
104
224
474
105
220
330
470
680
1000
1500
2200
3300
4700
6800
10000
15000
22000
33000
47000
68000
100000
220000
470000
1000000
V
P
Z
V
Z
P
V
V
V
V
Z
Z
Z
Z
V
I1
I1
V
V
V
V
注Dグラフの記号は製品厚 み記号です。 NoteDLetter codes in shaded areas are thickness codes. I1 Items are only available in X5R
温度特性ꢀTemperature Characteristics
静電容量許容差ꢀCapacitance Tolerance
区分
tan dꢀ
温度範囲
Operating
temp. range
[C]
静電容量
変化率
Capacitance
Change [%]
許容差
記号
温度特性
Temperature
基
Ref. Temp.
準温度
区分
Item
Type
063
tan d
Item
Tolerance
Code
F1
[C]
Characteristics
ꢀB/BJ
ꢀX7R
ꢀX5R
ꢀF
K
M10L
M20L
B Char.
B Char.
T3.5L B Char. 10V
K25V85
K55V125
K55V85
K25V85
K30V85
20
25
25
20
25
M10
M15
M15
J30
K80
J22
K82
M
T5.0L B Char. 6.3V
107
105
T2.5L B Char.
J80
Z
L
F Char.
K20
T5.0L F Char.
T2.5L B Char. 50V, 25V
T3.5L B Char. 16V, 0.027V0.047AF
T5.0L F Char. 50V, 25V B Char. 0.056V0.1AF
T7.0L F Char. 0.033AF, 0.047AF
T9.0L F Char. 0.068AFV0.1AF
T11L F Char. 0.22AF
T16L F Char. 0.47AF
T20L F Char. 1AF
ꢀF/Y5V
F1ꢀ 定周 波数ꢀMeasurement frequencyW1M0.1kHz
ꢀꢀ 定電圧ꢀꢀMeasurement voltage W1M0.2Vrms
セレクションガイド
Selection Guide
アイテム一覧
Part Numbers
特性図
Electrical Characteristics
梱包
Packaging
信
頼性
使用上の注意
Reliability Data
Precautions
AA
P.8
etc
P.54
P.78
P.80
P.86
53
アイテム一覧ꢀPART NUMBERS
063TYPE(0201 case size)
定ꢀ格
公ꢀꢀ称
静電容量
tanδ
Dissipation
factor
実装条件
静電容量
許 容 差
形ꢀꢀ名
電ꢀ圧
厚 ꢀꢀみ
温度特性
Soldering method
Rated Voltage
Capacitance Temp.Char
R:リフロー Reflow soldering Capacitance
Thickness
hmmi(inch)
0.3±0.03
Ordering code
fDCg
hpFi
h%iMax.
3.5
W: フロー Wave soldering
tolerance [L]
±10％
10V
LMK063 BJ102□P
JMK063 BJ103□P
1000
BJ/X5R
10000
R
6.3V
5
±20％
(0.012±0.001)
形名のGには静電容量許容差記号が入ります。
GPlease specify the capacitance tolerance code.
105TYPE(0402 case size)
定ꢀ格
公ꢀꢀ称
tanδ
Dissipation
factor
実装条件
静電容量
許 容 差
形ꢀꢀ名
電ꢀ圧
厚 ꢀꢀみ
静電容量
温度特性
Soldering method
Rated Voltage
Capacitance Temp.Char
R:リフロー Reflow soldering Capacitance
Thickness
Ordering code
fDCg
hpFi
h%iMax.
W: フロー Wave soldering
tolerance [L]
hmmi(inch)
UMK105 BJ221GV
UMK105 BJ331GV
UMK105 BJ471GV
UMK105 BJ681GV
220
330
470
680
50V
UMK105 BJ102GV
UMK105 BJ152GV
UMK105 BJ222GV
UMK105 BJ332GV
TMK105 BJ472GV
TMK105 BJ682GV
EMK105 BJ103GV
EMK105 BJ153GV
EMK105 BJ223GV
LMK105 BJ333GV
LMK105 BJ473GV
LMK105 BJ683GV
LMK105 BJ104GV
UMK105 F 1 0 3 Z V
TMK105 F 2 2 3 Z V
EMK105 F 4 7 3 Z V
EMK105 F 1 0 4 Z V
LMK105 F 2 2 4 Z V
JMK105 F 4 7 4 Z V
AMK105 F 1 0 5 Z V
1000
1500
2200
3300
BJ/X7R
2.5
3.5
±10%
±20%
0.5±0.05
(0.020±0.002)
4700
R
25V
16V
6800
10000
15000
22000
33000
47000
68000
100000
10000
22000
47000
100000
220000
470000
1000000
10V
BJ/X5R
F/Y5V
5
5
50V
25V
7
16V
＋80％
－20％
0.5±0.05
9
R
(0.020±0.002)
10V
6.3V
4V
11
16
20
形名のGには静電容量許容差記号が入ります。
GPlease specify the capacitance tolerance code.
54
アイテム一覧ꢀPART NUMBERS
107TYPE(0603 case size)
定ꢀ格
公ꢀꢀ称
静電容量
tanδ
Dissipation
factor
実装条件
静電容量
許 容 差
形ꢀꢀ名
電ꢀ圧
厚 ꢀꢀみ
温度特性
Soldering method
Rated Voltage
Capacitance Temp.Char
R:リフロー Reflow soldering Capacitance
Thickness
Ordering code
fDCg
hpFi
h%iMax.
W: フロー Wave soldering
tolerance [L]
hmmi(inch)
UMK107 B102□Z
UMK107 B152□Z
UMK107 B222□Z
1000
1500
2200
3300
4
50V
UMK107 B332□Z
UMK107 B472□Z
UMK107 B682□Z
UMK107 B103□Z
TMK107 B153□Z
TMK107 B223□Z
UMK107 F 1 0 3 Z Z
UMK107 F 2 2 3 Z Z
TMK107 F 4 7 3 Z Z
TMK107 F 1 0 4 Z Z
±10%
±20%
0.8±0.10
4700
6800
BJ/X7R
2.5
W, R
(0.031±0.004)
10000
15000
22000
10000
22000
47000
25V
50V
25V
＋80％
－20％
0.8±0.10
F/Y5V
5
W, R
(0.031±0.004)
100000
形名のGには静電容量許容差記号が入ります。
GPlease specify the capacitance tolerance code.
55
1/3
RELIABILITY DATA
Multilayer Ceramic Capacitor Chips
Specified Value
Temperature Compensating (Class 1)
Standard High Frequency Type
Item
High Permitivity (Class 2)
Standard Note1 High Value
BDK55 to J125C
Test Methods and Remarks
High Capacitance Type BJfX7RgDK55 to J125C
BJfX5RgDK55 to J85C
BFfY5VgDK30 to J85C
High Capacitance Type BJfX7RgDK55 to J125C
BJfX5RgDK55 to J85C
1.Operating Temperature K55 to J125C
K25 to J85C
Range
FDK25 to J85C
BDK55 to J125C
FDK25 to J85C
50VDC,25VDC
2.Storage Temperature K55 to J125C
K25 to J85C
Range
BFfY5VgDK30 to J85C
4
3.Rated Voltage
50VDC,25VDC,
16VDC
16VDC
50VDC,35VDC,25VDC
16VDC,10VDC,6.3VDC
4DVC
4.Withstanding Voltage
Between terminals
No breakdown or dam- No abnormality
age
No breakdown or damage
Applied voltage: Rated voltageP3 (Class 1)
Rated voltageP2.5 (Class 2)
Duration: 1 to 5 sec.
Charge/discharge current: 50mA max. (Class 1,2)
5.Insulation Resistance
10000 ME min.
500 MEAF. or 10000 ME., whichever is the Applied voltage: Rated voltage
smaller.
Note 4
Duration: 60M5 sec.
Charge/discharge current: 50mA max.
Measuring frequencyD
6.Capacitance (Tolerance)
0.5 to 5 pF: M0.25 pF
1 to 10pF: M0.5 pF
5 to 10 pF: M1 pF
11 pF or over: M 5%
M10%
0.5 to 2 pF : M0.1 pF
2.2 to 5.1 pF : M5%
B: M10%, M20%
J80
BJDM10L, M20L
J80
K20
Class1D 1ＭHzM10%fCT1000pFg
1ｋHzM10%fCX1000pFg
FD
%
FD
%
K20
Class2D 1ｋHzM10%fCT22 Fg
A
120HzM10HzfCX22 Fg
A
Measuring voltageD
Class1D0.5V5VrmsfCT1000pFg
1M0.2VrmsfCX1000pFg
105TYPERQ, SQ, TQ, UQ only
0.5～2pF: M0.1pF
Class2D 1M0.2VrmsfCT22 Fg
A
0.5M0.1VrmsfCX22 Fg
A
2.2～20pF: M5%
Bias application: None
7.Q or Tangent of Loss Angle
Under 30 pF
Refer to detailed speci- B: 2.5% max.(50V, 25V)
Multilayer:
BJ: 2.5% max.(50V, 35V, 25V)
ꢀ3.5% max. F
ꢀ5.0% max. F
ꢀ10.0% max. F
F: 7.0% max.
Measuring frequencyD
(tan d)
: QU400 + 20C
fication
F: 5.0% max. (50V, 25V)
Class1D 1ＭHzM10%fCT1000pFg
1ｋHzM10%fCX1000pFg
30 pF or over : QU1000
C= Nominal capacitance
ꢀ
Class2D 1ｋHzM10%fCT22 Fg
A
120HzM10HzfCX22 Fg
A
Measuring voltageD
ꢀ5.0% max. F
ꢀ9.0% max. F
ꢀ11.0% max. F
ꢀ16.0% max. F
ꢀ20.0% max. F
ꢀF See Table.1
ꢀꢀꢀꢀꢀꢀ
Class1D0.5V5VrmsfCT1000pFg
1M0.2VrmsfCX1000pFg
Class2D 1M0.2VrmsfCT22AFg
0.5M0.1VrmsfCX22 Fg
A
Bias application: None
High-Frequency-Multilayer:
Measuring frequency: 1GHz
Measuring equipment: HP4291A
Measuring jig: HP16192A
8.Temperature
(Without
CKD0M250
CHD0M60
RHDK220M60
fppm/Cg
BDM10LfK25V85Cg
J30
According to JIS C 5102 clause 7.12.
Temperature compensating:
BJDM10LfK25V85Cg
J30
K80ꢀ
Characteristic
voltage
CJD0M120
FD
LfK25V85Cg
K80
FD
L fK25V85Cg
of Capacitance
application)
CHD0M60
BfX7RgDM15L
J22
Measurement of capacitance at 20C and 85C shall be made
to calculate temperature characteristic by the following
equation.
BJfX7R,X5RgDM15L
J22
CGD0M30
FfY5VgDꢀꢀL
K82
FfY5VgDꢀꢀL
K82
PKDK150M250
PJDK150M120
PHDK150M60
RKDK220M250
RJDK220M120
RHDK220M60
SKDK330M250
SJDK330M120
SHDK330M60
TKDK470M250
TJDK470M120
THDK470M60
UKDK750M250
UJDK750M120
SLD +350 to -1000 (ppm/C)
Appearance:
20
(Cꢀ85 - Cꢀ)
6
P 10 ꢀ(ppm/C)
Cꢀ20 P QT ꢀ
High permitivity:
Change of maximum capacitance deviation in step 1 to 5
Temperature at step 1: +20C
Temperature at step 2: minimum operating temperature
Temperature at step 3: +20C (Reference temperature)
Temperature at step 4: maximum operating temperature
Temperature at step 5: +20C
Reference temperature for X7R, X5R and Y5V shall be +25C
9.Resistance to Flexure of
Substrate
Appearance:
Appearance:
Warp: 2mm
Testing board: paper-phenol substrate
Thickness: 1.6mm
No abnormality
Capacitance change:
No abnormality
No abnormality
Capacitance change: Capacitance change:
The measurement shall be made with board in the bent position.
Within M5% or M0.5 pF, WithinM0.5 pF
B, BJ: Within M12.5%
F: Within M30%
whichever is larger.
81
2/3
RELIABILITY DATA
Multilayer Ceramic Capacitor Chips
Specified Value
Temperature Compensating (Class 1)
Standard High Frequency Type
Item
High Permittivity (Class 2)
Standard Note1 High Value
Test Methods and Remarks
10.Body Strength
No mechanical dam-
age.
High Frequency Multilayer:
Applied force: 5N
Duration: 10 sec.
4
11.Adhesion of Electrode
No separation or indication of separation of electrode.
Applied force: 5N
Duration: 30M5 sec.
12.Solderability
At least 95% of terminal electrode is covered by new solder.
Solder temperature: 230M5C
Duration: 4M1 sec.
13.Resistance to soldering
Appearance: No abnor- Appearance: No abnor- Appearance: No abnormality
Preconditioning: Thermal treatment (at 150C for 1 hr)
(Applicable to Class 2.)
mality
mality
Capacitance change: Within M7.5% (B, BJ)
Within M20% (F)
Capacitance change: Capacitance change:
Within M 2.5% or Within M2.5%
M0.25pF, whichever is Q: Initial value
Solder temperature: 270M5C
tan d: Initial value
Duration: 3M0.5 sec.
Insulation resistance: Initial value
Preheating conditions: 80 to 100C, 2 to 5 min. or 5 to 10 min.
150 to 200C, 2 to 5 min. or 5 to 10 min.
Recovery: Recovery for the following period under the stan-
dard condition after the test.
larger.
Insulation resistance: Withstanding voltage (between terminals): No
Initial value abnormality
Q: Initial value
Insulation resistance: Withstanding voltage
Initial value (between terminals): No
24M2 hrs (Class 1)
Withstanding voltage abnormality
(between terminals): No
abnormality
48M4 hrs (Class 2)
14.Thermal shock
Appearance: No abnor- Appearance: No abnor- Appearance: No abnormality
Preconditioning: Thermal treatment (at 150C for 1 hr)
(Applicable to Class 2.)
mality
mality
Capacitance change: Within M7.5% (B, BJ)
Within M20% (F)
Capacitance change: Capacitance change:
Within M 2.5% or Within M0.25pF
M0.25pF, whichever is Q: Initial value
Conditions for 1 cycle:
tan d: Initial value
Step 1: Minimum operating temperature 30M3 min.
Insulation resistance: Initial value
Step 2: Room temperature
15 min.
larger.
Insulation resistance: Withstanding voltage (between terminals): No Step 3: Maximum operating temperature 30M3 min.
Q: Initial value
Initial value
abnormality
Step 4: Room temperature
Number of cycles: 5 times
15 min.
Insulation resistance: Withstanding voltage
Initial value (between terminals): No
Recovery after the test: 24M2 hrs (Class 1)
48M4 hrs (Class 2)
Withstanding voltage abnormality
(between terminals): No
abnormality
15.Damp Heat (steady state)
Appearance: No abnor- Appearance: No abnor- Appearance: No abnor- Appearance: No abnor- MultilayerD
mality
mality
mality
mality
Preconditioning: Thermal treatment (at 150C for 1 hr)
(Applicable to Class 2.)
Capacitance change: Capacitance change: Capacitance change:
Capacitance change:
BJ: Within M12.5%
F: Within M30%
tan d: BJ: 5.0% max.
7.5% max.F
Within M5% or M0.5pF, Within M0.5pF,
B: Within M12.5%
F: Within M30%
tan d: B: 5.0% max.
F: 7.5% max.
Temperature: 40M2C
whichever is larger.
Q:
Insulation resistance:
1000 ME min.
Humidity: 90 to 95% RH
+24
Duration: 500 K hrs
0
CU30 pF : QU350
10TC＜30 pF: QU275
+ 2.5C
Recovery: Recovery for the following period under the stan-
dard condition after the removal from test chamber.
24M2 hrs (Class 1)
20.0% max.F
Insulation resistance: 50
ME A F or 1000 ME
whichever is smaller.
F: 11.0% max.
7.5% max.F
C＜10 pF : QU200 +
10C
48M4 hrs (Class 2)
16.0% max.F
High-Frequency Multilayer:
C: Nominal capacitance
Insulation resistance:
1000 ME min.
19.5% max.F
Temperature: 60M2C
25.0% max.F
Humidity: 90 to 95% RH
+24
FSee Table.2
Duration: 500 K hrs
0
Insulation resistance: Recovery: Recovery for the following period under the stan-
50 MEAF or 1000 ME dard condition after the removal from test chamber.
whichever is smaller.
24M2 hrs (Class 1)
83
3/3
RELIABILITY DATA
Multilayer Ceramic Capacitor Chips
Specified Value
Temperature Compensating (Class 1)
Standard High Frequency Type
16.Loading under Damp Heat Appearance: No abnor- Appearance: No abnor- Appearance: No abnor- Appearance: No abnor- According to JIS C 5102 Clause 9. 9.
Item
High Permittivity (Class 2)
Standard Note1 High Value
Test Methods and Remarks
mality
mality
mality
mality
Multilayer:
Capacitance change: Capacitance change:
Capacitance change:
Capacitance change: Preconditioning: Voltage treatment (Class 2)
Within M 7.5% or CT2 pF: Within M0.4 pF B: Within M12.5%
M0.75pF, whichever is CX2 pF: Within M0.75 F: Within M30%
BJ: Within M 12.5% Temperature: 40M2C
4
(50V, 35V, 25V)
Humidity: 90 to 95% RH
+24
larger.
pF
tan d: B: 5.0% max.
Within M 15.0% (16V Duration: 500 K hrs
0
Q: CU30 pF: QU200
CD Nominal capaci-
F: 7.5% max.
and under)
Applied voltage: Rated voltage
Charge and discharge current: 50mA max. (Class 1,2)
C＜30 pF: QU 100 + tance
10C/3
F: Within M30%
Insulation resistance: Insulation resistance: tan d: BJ: 5.0% max.
Recovery: Recovery for the following period under the standard
condition after the removal from test chamber.
24M2 hrs (Class 1)
CD Nominal capaci- 500 ME min.
tance
25 MEAF or 500 ME,
7.5% max.F
20.0% max.F
F: 11.0% max.
7.5% max.F
whichever is the smaller.
Insulation resistance:
500 ME min.
48M4 hrs (Class 2)
High-Frequency Multilayer:
16.0% max.F Temperature: 60M2C
19.5% max.F Humidity: 90 to 95% RH
+24
25.0% max.F Duration: 500
hrs
0
K
FSee Table.2 Applied voltage: Rated voltage
Insulation resistance: Charge and discharge current: 50mA max.
25 MEAF or 500 ME, Recovery: 24M2 hrs of recovery under the standard condi-
whichever is the smaller.
tion after the removal from test chamber.
17.Loading at High Tempera- Appearance: No abnor- Appearance: No abnor- Appearance: No abnor- Appearance: No abnormality According to JIS C 5102 clause 9.10.
ture
mality
mality
mality
Capacitance change:
BJ: Within M12.5%
F: Within M30%
tan d: 5.0% max.
7.5% max.F
Multilayer:
Capacitance change:
Within M3% or
M0.3pF, whichever is
larger.
Capacitance change:
Within M3% or
M0.3pF, whichever is
larger.
Capacitance change:
B: Within M12.5%
F: Within M30%
tan d:
Preconditioning: Voltage treatment (Class 2)
Temperature:125M3CfClass 1, Class 2: B, BJfX7Rgg
85M2C (Class 2: BJ,F)
+48
Duration: 1000 K hrs
0
Q: CU30 pF : QU350
Insulation resistance:
B: 4.0% max.
20.0% max.F
Applied voltage: Rated voltageP2
Recovery: Recovery for the following period under the stan-
dard condition after the removal from test chamber.
As for Ni product, thermal treatment shall be performed
prior to the recovery.
10TC＜30 pF: QU275 1000 ME min.
+ 2.5C
F: 7.5% max.
F: 11.0% max.
Insulation resistance:
50 MEAF or 1000 ME,
whichever is smaller.
ꢀ7.5% max.F
ꢀ16.0% max.F
ꢀ19.5% max.F
ꢀ25.0% max.F
ꢀFSee Table.2
C＜10 pF: QU200 +
10C
CD Nominal
24M2 hrs (Class 1)
capacitance
48M4 hrs (Class 2)
Insulation resistance:
1000 ME min.
Insulation resistance: 50 High-Frequency Multilayer:
MEAF or 1000 ME, which- Temperature: 125M3C (Class 1)
+48
ever is smaller.
Duration: 1000 K hrs
0
Applied voltage: Rated voltageP2
Recovery: 24M2 hrs of recovery under the standard condi-
tion after the removal from test chamber.
Note 1: For 105 type, specified in "High value".
Note 2: Thermal treatment (Multilayer): 1 hr of thermal treatment at 150 J0 /K10 C followed by 48M4 hrs of recovery under the standard condition shall be performed before the measurement.
Note 3: Voltage treatment (Multilayer): 1 hr of voltage treatment under the specified temperature and voltage for testing followed by 48M4 hrs of recovery under the standard condition shall be performed before the measurement.
Note on standard condition: "standard condition" referred to herein is defined as follows: 5 to 35C of temperature, 45 to 85% relative humidity, and 86 to 106kPa of air pressure.
When there are questions concerning measurement results: In order to provide correlation data, the test shall be conducted under condition of 20M2C of temperature, 65 to 70% relative humidity,
and 86 to 106kPa of air pressure. Unless otherwise specified, all the tests are conducted under the "standard condition."
Note 4: Specified value for Instration Resistance of JMK212BJ475M only: 100MEAF or more.
Table. 2ꢀtand(D. F.)
Table. 1ꢀtand(D. F.)
Item
BJ: LMK type; 063 type
105 type (CT0.047AF)
Item
tand
tand
BJ: JMK type
LMK type; 063 type
107 type (CT0.47AF)
212 type (CT1AF)
316 / 325 / 432 type
105 type (CU0.056AF)
107 type (CU0.47AF)
212 type (C > 1AF)
7.5% max.
EMK type; 105 / 107/ 212 / 316 / 325 type
TMK type; 316 type(C > 0.47AF)
325 / 432 type
GMK type;212 type (CU0.22AF)
316 type (CU0.68AF)
325 type
UMK type;212 type (C > 0.1AF)
316 type (CU0.47AF)
3.5%max.
J4K, E4K type
F: 105 type(50V, 25V)
F: LMK type; 105 type (CW0.22AF)
F: JMK type; 105 / 107 / 212 / 316 / 325 / 432 type
LMK type; 107 type
432 type
16.0% max.
19.5% max.
325 type (C T1AF)
E4K type
BJ: JMK type
BJ: AMK type
20.0% max.
25.0% max.
LMK type; 105 type (CU0.056AF)
107 type (C > 0.47AF)
212 type (C > 1AF)
F: AMK type
5.0% max.
J4K, E4K type
F: 105 type (50V, 25V)
F: LMK type; 212 type
316 type (CW10AF)D汎用
(
CW4.7AF)D低背
325 type (C > 10AF)
EMK type;105 type (C U0.068AF)
UMK type;325 type (C U4.7AF)
BJ: AMK type
F: LMK type; 105 type (C W0.22AF)
F: JMK type; 105 / 107 / 212 / 316 / 325 / 432 type
LMK type; 107 type,325 type
432 type,316 type (C > 10AF)
E4K type
9.0% max.
10.0% max.
11.0% max.
16.0% max.
20.0% max.
F: AMK type
85
梱包ꢀPACKAGING
1標準数量 Standard quantity
F袋づめ梱包 Bulk packagingꢀ
2テーピング材質ꢀTaping material
製品厚
み
標準数量
Standard
quantity
形式fEIAg
Thickness
Type
mmfinchg
0.5
code
V
[pcs]
GMK105f0402g
f0.020g
W
E VK105f0402g
GMK107f0603g
0.8
f0.031g
0.85
f0.033g
1.25
f0.049g
0.85
f0.033g
0.85
f0.033g
1.15
f0.045g
1.25
f0.049g
1.6
f0.063g
1.15
f0.045g
0.85
f0.033g
1.15
f0.045g
1.5
f0.059g
1.9
A
Z
D
G
D
D
F
GMK212f0805g
G4K212f0805g
1000
GMK316f1206g
G4K316f1206g
G
L
F
D
F
GMK325f1210g
H
N
M
f0.075g
2.5
f0.098g
Fテーピング梱包ꢀTaped packagingꢀ
標準数量
Standard quantity
[pcs]
製品厚
み
形式fEIAg
Type
Thickness
紙テープ
paper
エンボステープ
Embossed tape
code
mmfinchg
0.3
f0.012g
GMK063f0201g
GMK105f0402g
P
E
E
15000
10000
V
0.5
f0.020g
W
E VK105f0402g
GMK107f0603g
0.8
f0.031g
0.85
f0.033g
1.25
f0.049g
0.85
f0.033g
0.85
f0.033g
1.15
f0.045g
1.25
f0.049g
1.6
f0.063g
1.15
f0.045g
0.85
f0.033g
1.15
A
Z
E
E
4000
4000
E
D
G
D
D
F
GMK212f0805g
G4K212f0805g
3バルクカセットꢀBulk Cassette
3000
E
4000
4000
E
GMK316f1206g
G4K316f1206g
GMK325f1210g
3000
2000
E
E
G
L
F
D
F
f0.045g
1.5
f0.059g
2000
E
H
1.9
f0.075g
2.5
f0.098g
2.5
f0.098g
2.5
f0.098g
N
M
M
M
500
500
500
E
E
E
GMK432f1812g
GMK550f2220g
UnitDmm finchg
105, 107, 212形状で個 別対応致しますのでお問い合せ下さい。
Please contact any of our offices for accepting your requirement according
to dimensions 0402, 0603, 0805.(inch)
78
梱包ꢀPACKAGING
3テーピング寸法ꢀTaping dimensionsꢀ
エンボステープꢀEmbossed tape（12mm幅）f0.472inches wideg
ꢀ紙テープꢀPaper Tape（8mm幅）f0.315inches widegꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
4
Type
Type
チップ挿入部
Chip Cavity
B
挿入ピッチ テープ厚
み
チップ挿入部
挿入ピッチ テープ厚 み
fEIAg
Insertion Pitch Tape Thickness
fEIAg
Chip cavity
Insertion Pitch Tape Thickness
A
F
T
A
B
F
K
T
0.37M0.065 0.67M0.065 52.0M0.05
0.42M0.02
GMK063f0201g
f0.06M0.002g f0.027M0.002g f0.079M0.002g f0.017M0.001g
3.7M0.2
4.9M0.2
8.0M0.1
3.4max. 0.6max.
GMK432f1812g
GMK550f2220g
GMK105f0402g 0.65M0.15
1.15M0.15 52.0M0.05
0.8max.
f0.146M0.008g
f0.193M0.008g
f0.315M0.004g
f0.134max.g f0.024max.g
ＥVK105f0402g f0.026M0.004g f0.045M0.004g f0.079M0.002g
f0.031max.g
1.0M0.2
1.8M0.2
5.4M0.2
6.1M0.2
8.0M0.1
3.5max. 0.6max.
GMK107f0603g
GMK212f0805g 1.65M0.25
f0.039M0.008g f0.071M0.008g
f0.213M0.008g
f0.240M0.008g
f0.315M0.004g
f0.138max.g f0.024max.g
2.4M0.2
4.0M0.1
1.1max.
UnitDmmfinchg
G4K212f0805g f0.065M0.008g f0.094M0.008g f0.157M0.004g
f0.043max.g
4リーダ部／空部ꢀLeader and Blank portionꢀ
2.0M0.2
3.6M0.2
GMK316f1206g
f0.079M0.008g f0.142M0.008g
UnitDmmfinchg
ꢀエンボステープꢀEmbossed tape（8mm幅）f0.315inches wideg
5リール寸法ꢀReel sizeꢀ
Type
チップ挿入部
挿入ピッチ テープ厚 み
fEIAg
Chip cavity
Insertion Pitch Tape Thickness
A
B
F
K
T
1.65M0.25
2.4M0.2
GMK212f0805g
f0.065M0.008g f0.094M0.008g
GMK316f1206g
G4K316f1206g
GMK325f1210g
2.0M0.2
3.6M0.2
4.0M0.1 2.5max. 0.6max
f0.079M0.008g f0.142M0.008g f0.157M0.004g f0.098max.g f0.024max.g
6トップテープ強度ꢀTop Tape Strengthꢀ
2.8M0.2
3.6M0.2
3.4max.
f0.110M0.008g f0.142M0.008g
f0.134max.g
トップテープのはがし力は下図矢印方向にて0.1～0.7Nとなります。
The top tape requires a peel-off force of 0.1V0.7N in the direction of the
arrow as illustrated below.
UnitDmmfinchg
79
1/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
1.Circuit Design
Verification of operating environment, electrical rating and per-
formance
1. A malfunction in medical equipment, spacecraft, nuclear re-
actors, etc. may cause serious harm to human life or have
severe social ramifications. As such, any capacitors to be
used in such equipment may require higher safety and/or reli-
ability considerations and should be clearly differentiated from
components used in general purpose applications.
4
Operating Voltage (Verification of Rated voltage)
1. The operating voltage for capacitors must always be lower
than their rated values.
If an AC voltage is loaded on a DC voltage, the sum of the two
peak voltages should be lower than the rated value of the ca-
pacitor chosen. For a circuit where both an AC and a pulse
voltage may be present, the sum of their peak voltages should
also be lower than the capacitor's rated voltage.
2. Even if the applied voltage is lower than the rated value, the
reliability of capacitors might be reduced if either a high fre-
quency AC voltage or a pulse voltage having rapid rise time is
present in the circuit.
1.The following diagrams and tables show some examples of recommended patterns to
prevent excessive solder amourts.flarger fillets which extend above the component end
terminationsg
2.PCB Design
Pattern configurations
(Design of Land-patterns)
1. When capacitors are mounted on a PCB, the amount of sol-
der used (size of fillet) can directly affect capacitor performance.
Therefore, the following items must be carefully considered in
the design of solder land patterns:
Examples of improper pattern designs are also shown.
(1) Recommended land dimensions for a typical chip capacitor land patterns for PCBs
(1) The amount of solder applied can affect the ability of chips
to withstand mechanical stresses which may lead to break-
ing or cracking. Therefore, when designing land-patterns
it is necessary to consider the appropriate size and con-
figuration of the solder pads which in turn determines the
amount of solder necessary to form the fillets.
(2) When more than one part is jointly soldered onto the same
land or pad, the pad must be designed so that each
component's soldering point is separated by solder-re-
sist.
Recommended land dimensions for wave-soldering (unit: mm)
Type
107
1.6
0.8
212
2.0
316
3.2
1.6
325
3.2
2.5
L
Size
W
51.25
A
B
0.8V1.0 1.0V1.4 1.8V2.5 1.8V2.5
0.5V0.8 0.8V1.5 0.8V1.7 0.8V1.7
0.6V0.8 0.9V1.2 1.2V1.6 1.8V2.5
C
Recommended land dimensions for reflow-soldering (unit: mm)
Type
063
0.6
0.3
105
1.0
0.5
107
1.6
0.8
212
2.0
316
3.2
1.6
325
3.2
2.5
432
4.5
3.2
550
5.7
5.0
L
Size
W
51.25
A
0.20V0.30 0.45V0.55 0.6V0.8 0.8V1.2 1.8V2.5 1.8V2.5 2.5V3.5 3.7V4.7
0.20V0.30 0.40V0.50 0.6V0.8 0.8V1.2 1.0V1.5 1.0V1.5 1.5V1.8 1.5V2.3
0.25V0.40 0.45V0.55 0.6V0.8 0.9V1.6 1.2V2.0 1.8V3.2 2.3V3.5 3.5V5.5
B
C
Excess solder can affect the ability of chips to withstand mechanical stresses. Therefore,
please take proper precautions when designing land-patterns.
Type
316（4 circuits） 212（4 circuits）
L
W
a
3.2
1.6
2.0
1.25
0.7V0.9
1
0.5V0.6
0.5V0.6
0.2V0.3
0.5
b
c
0.4V0.5
0.8
d
87
2/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
2.PCB Design
(2) Examples of good and bad solder application
Not recommended
Recommended
Items
Mixed mounting
of SMD and
leaded
components
4
Component
placement close
to the chassis
Hand-soldering
of leaded
components
near mounted
components
Horizontal
component
placement
Pattern configurations
1-1. The following are examples of good and bad capacitor layout; SMD capacitors should
be located to minimize any possible mechanical stresses from board warp or deflection.
(Capacitor layout on panelized [breakaway] PC boards)
1. After capacitors have been mounted on the boards, chips can
be subjected to mechanical stresses in subsequent manufac-
turing processes (PCB cutting, board inspection, mounting of
additional parts, assembly into the chassis, wave soldering
the reflow soldered boards etc.) For this reason, planning
pattern configurations and the position of SMD capacitors
should be carefully performed to minimize stress.
Not recommended
Recommended
Deflection of
the board
1-2. To layout the capacitors for the breakaway PC board, it should be noted that the amount
of mechanical stresses given will vary depending on capacitor layout. The example
below shows recommendations for better design.
1-3. When breaking PC boards along their perforations, the amount of mechanical stress on
the capacitors can vary according to the method used. The following methods are listed
in order from least stressful to most stressful: push-back, slit, V-grooving, and perfora-
tion. Thus, any ideal SMD capacitor layout must also consider the PCB splitting proce-
dure.
89
3/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
3.Considerations for auto-
matic placement
Adjustment of mounting machine
1. If the lower limit of the pick-up nozzle is low, too much force may be imposed on the
capacitors, causing damage. To avoid this, the following points should be considered
before lowering the pick-up nozzle:
1. Excessive impact load should not be imposed on the capaci-
tors when mounting onto the PC boards.
2. The maintenance and inspection of the mounters should be
conducted periodically.
(1)The lower limit of the pick-up nozzle should be adjusted to the surface level of the PC
board after correcting for deflection of the board.
(2)The pick-up pressure should be adjusted between 1 and 3 N static loads.
(3)To reduce the amount of deflection of the board caused by impact of the pick-up nozzle,
supporting pins or back-up pins should be used under the PC board. The following dia-
grams show some typical examples of good pick-up nozzle placement:
4
Not recommended
Recommended
Single-sided
mounting
Double-sided
mounting
2. As the alignment pin wears out, adjustment of the nozzle height can cause chipping or
cracking of the capacitors because of mechanical impact on the capacitors. To avoid
this, the monitoring of the width between the alignment pin in the stopped position, and
maintenance, inspection and replacement of the pin should be conducted periodically.
Selection of Adhesives
1. Some adhesives may cause reduced insulation resistance. The difference between the
shrinkage percentage of the adhesive and that of the capacitors may result in stresses
on the capacitors and lead to cracking. Moreover, too little or too much adhesive applied
to the board may adversely affect component placement, so the following precautions
should be noted in the application of adhesives.
1. Mounting capacitors with adhesives in preliminary assembly,
before the soldering stage, may lead to degraded capacitor
characteristics unless the following factors are appropriately
checked; the size of land patterns, type of adhesive, amount
applied, hardening temperature and hardening period. There-
fore, it is imperative to consult the manufacturer of the adhe-
sives on proper usage and amounts of adhesive to use.
(1)Required adhesive characteristics
a. The adhesive should be strong enough to hold parts on the board during the mounting &
solder process.
b. The adhesive should have sufficient strength at high temperatures.
c. The adhesive should have good coating and thickness consistency.
d. The adhesive should be used during its prescribed shelf life.
e. The adhesive should harden rapidly
f. The adhesive must not be contaminated.
g. The adhesive should have excellent insulation characteristics.
h. The adhesive should not be toxic and have no emission of toxic gasses.
(2)The recommended amount of adhesives is as follows;
Figure
212/316 case sizes as examples
0.3mm min
a
b
c
100 V120 Am
Adhesives should not contact the pad
91
4/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
Selection of Flux
1-1. When too much halogenated substance (Chlorine, etc.) content is used to activate the
flux, or highly acidic flux is used, an excessive amount of residue after soldering may
lead to corrosion of the terminal electrodes or degradation of insulation resistance on
the surface of the capacitors.
4. Soldering
1. Since flux may have a significant effect on the performance of
capacitors, it is necessary to verify the following conditions
prior to use;
(1)Flux used should be with less than or equal to 0.1 wt%
(equivelent to chroline) of halogenated content. Flux hav-
ing a strong acidity content should not be applied.
(2)When soldering capacitors on the board, the amount of
flux applied should be controlled at the optimum level.
(3)When using water-soluble flux, special care should be taken
to properly clean the boards.
1-2. Flux is used to increase solderability in flow soldering, but if too much is applied, a large
amount of flux gas may be emitted and may detrimentally affect solderability. To mini-
mize the amount of flux applied, it is recommended to use a flux-bubbling system.
1-3. Since the residue of water-soluble flux is easily dissolved by water content in the air, the
residue on the surface of capacitors in high humidity conditions may cause a degrada-
tion of insulation resistance and therefore affect the reliability of the components. The
cleaning methods and the capability of the machines used should also be considered
carefully when selecting water-soluble flux.
4
Soldering
1-1. Preheating when soldering
Temperature, time, amount of solder, etc. are specified in accor-
dance with the following recommended conditions.
Heating: Ceramic chip components should be preheated to within 100 to 130C of the sol-
dering.
Cooling: The temperature difference between the components and cleaning process should
not be greater than 100C.
Ceramic chip capacitors are susceptible to thermal shock when exposed to rapid or concen-
trated heating or rapid cooling. Therefore, the soldering process must be conducted with
great care so as to prevent malfunction of the components due to excessive thermal shock.
Recommended conditions for soldering
[Reflow soldering]
Temperature profile
Caution
1. The ideal condition is to have solder mass (fillet) controlled to 1/2 to 1/3 of the thick-
ness of the capacitor, as shown below:
2. Because excessive dwell times can detrimentally affect solderability, soldering dura-
tion should be kept as close to recommended times as possible.
[Wave soldering]
Temperature profile
Caution
1. Make sure the capacitors are preheated sufficiently.
2. The temperature difference between the capacitor and melted solder should not be
greater than 100 to130C
3. Cooling after soldering should be as gradual as possible.
4. Wave soldering must not be applied to the capacitors designated as for reflow solder-
ing only.
93
5/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
[Hand soldering]
4. Soldering
ꢀTemperature profile
4
Caution
1. Use a 20W soldering iron with a maximum tip diameter of 1.0 mm.
2. The soldering iron should not directly touch the capacitor.
5.Cleaning
Cleaning conditions
1. The use of inappropriate solutions can cause foreign substances such as flux residue to
adhere to the capacitor or deteriorate the capacitor's outer coating, resulting in a degra-
dation of the capacitor's electrical properties (especially insulation resistance).
2. Inappropriate cleaning conditions (insufficient or excessive cleaning) may detrimentally
affect the performance of the capacitors.
1. When cleaning the PC board after the capacitors are all
mounted, select the appropriate cleaning solution according
to the type of flux used and purpose of the cleaning (e.g. to
remove soldering flux or other materials from the production
process.)
2. Cleaning conditions should be determined after verifying,
through a test run, that the cleaning process does not affect
the capacitor's characteristics.
(1)Excessive cleaning
In the case of ultrasonic cleaning, too much power output can cause excessive vibration of
the PC board which may lead to the cracking of the capacitor or the soldered portion, or
decrease the terminal electrodes' strength. Thus the following conditions should be
carefully checked;
Ultrasonic output
Below 20 W/b
Ultrasonic frequency
Below 40 kHz
Ultrasonic washing period 5 min. or less
6.Post cleaning processes
1. With some type of resins a decomposition gas or chemical
reaction vapor may remain inside the resin during the harden-
ing period or while left under normal storage conditions result-
ing in the deterioration of the capacitor's performance.
2. When a resin's hardening temperature is higher than the
capacitor's operating temperature, the stresses generated by
the excess heat may lead to capacitor damage or destruction.
The use of such resins, molding materials etc. is not recom-
mended.
Breakaway PC boards (splitting along perforations)
1. When splitting the PC board after mounting capacitors and
other components, care is required so as not to give any
stresses of deflection or twisting to the board.
7.Handling
2. Board separation should not be done manually, but by using
the appropriate devices.
Mechanical considerations
1. Be careful not to subject the capacitors to excessive mechani-
cal shocks.
(1)If ceramic capacitors are dropped onto the floor or a hard
surface, they should not be used.
(2)When handling the mounted boards, be careful that the
mounted components do not come in contact with or bump
against other boards or components.
95
6/6
PRECAUTIONS
Precautions on the use of Multilayer Ceramic Capacitors
Stages
Precautions
Technical considerations
8.Storage conditions
Storage
1. If the parts are stored in a high temperature and humidity environment, problems such
as reduced solderability caused by oxidation of terminal electrodes and deterioration of
taping/packaging materials may take place. For this reason, components should be used
within 6 months from the time of delivery. If exceeding the above period, please check
solderability before using the capacitors.
1. To maintain the solderability of terminal electrodes and to keep
the packaging material in good condition, care must be taken
to control temperature and humidity in the storage area. Hu-
midity should especially be kept as low as possible.
YRecommended conditions
4
Ambient temperature
Humidity
Below 40C
Below 70% RH
The ambient temperature must be kept below 30C. Even un-
der ideal storage conditions capacitor electrode solderability
decreases as time passes, so ceramic chip capacitors should
be used within 6 months from the time of delivery.
YThe packaging material should be kept where no chlorine or
sulfur exists in the air.
2. The capacitance value of high dielectric constant capacitors
(type 2 &3) will gradually decrease with the passage of time,
so this should be taken into consideration in the circuit design.
If such a capacitance reduction occurs, a heat treatment of
150C for 1hour will return the capacitance to its initial level.
97
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